Optical lithography or photolithography has been widely used in the semiconductor industry in connection with the formation of a wide range of structures present in integrated circuit (IC) devices. The photolithography process generally begins with the formation of a photoresist layer on or over the top surface of a semiconductor substrate or wafer (or some intermediate layer). A reticle or mask having fully light non-transmissive opaque regions, which are often formed of chrome, and fully light transmissive clear regions, which are often formed of quartz, is positioned over the photoresist-coated wafer.
The mask is placed between a radiation or light source, which produces light of a pre-selected wavelength (e.g., ultraviolet light) and geometry, and an optical lens system, which may form part of a stepper or scanner apparatus. When light from the light source is directed onto the mask, the light is focused to generate a reduced mask image on the wafer, typically using the optical lens system, which contains one or several lenses, filters, and/or mirrors. The light passes through the clear regions of the mask to expose the underlying photoresist layer and is blocked by the opaque regions of the mask, leaving that underlying portion of the photoresist layer unexposed. The exposed photoresist layer can then be developed, typically through chemical removal of the exposed or unexposed regions of the photoresist layer. The end result is a semiconductor wafer coated with a photoresist layer exhibiting a desired pattern, which defines geometries, features, lines and shapes of that layer. This pattern can then be used for etching underlying regions of the wafer. geometries, features, lines and shapes of that layer. This pattern can then be used for etching underlying regions of the wafer.
There is a pervasive trend in the art of IC device design and fabrication to increase the density with which various structures are arranged and manufactured. As such, minimum line widths (often referred to as critical dimension (CD)), separations between lines, and pitch are becoming increasingly smaller. For example, nodes having a CD of about 45 nanometers (nm) to about 65 nm have been proposed. In the sub-micron processes employed to achieve devices of this scale, silicon yield is affected by factors such as reticle/mask pattern fidelity, optical proximity effects and photoresist processing. Some of the more prevalent concerns include line end pullback, corner rounding and line width variations. These concerns are largely dependent on local pattern density and topology.
Optical proximity correction (OPC) has been used to improve image fidelity. In general, current OPC techniques involve running a computer simulation that takes an initial data set, having information related to the desired pattern or layout, and manipulates the data set to arrive at a corrected data set in an attempt to compensate for the above-mentioned concerns. Briefly, the OPC process can be governed by a set of geometric rules (i.e., “rule-based OPC” employing fixed rules for geometric manipulation of the data set), a set of modeling principles (i.e., “model-based OPC” employing predetermined behavior data to drive geometric manipulation of the data set) or a hybrid combination of rule-based OPC and model-based OPC.
The computer simulation can involve iteratively refining the data set using, for example, an edge placement error value as a benchmark for the compensating process. That is, the data set can be manipulated based on the rules and/or models and the predicted placement of the edges contained in the pattern can be compared against their desired placement. For each edge, or segment thereof depending on how the edges are fragmented in the data set, a determination of how far the predicted edge/segment placement deviates from the desired location is derived. For instance, if the predicted edge placement corresponds to the desired location, the edge placement error for that edge will be zero.
While conventional OPC techniques have been effective for generating OPC edge movements to correct for proximity effects and other manufacturability concerns, these OPC techniques have been based on a simulation that does not include or otherwise take into account scattered light within the photolithography apparatus or scanner. However, all scanners produce undesirable scattered light that reaches the image plane, which is commonly referred to as flare. Flare can lead to several deleterious effects, such as degraded image contrast and CD variation.
Accordingly, a need exists in the art for an improved OPC technique that compensates for flare.